Flash memory device may store multiple bits of data per memory cell by programming each cell to one of multiple states. For example, multi-level cell (MLC) flash memory can store three bits per cell using eight states per cell, four bits per cell using sixteen states per cell, or larger numbers of bits per cell. Although storing multiple bits per cell enables high-density operation, multiple sensing operations may be required to determine which state each cell is in, increasing a read latency of the MLC flash memory. To illustrate, in a three-bit MLC flash memory, seven sensing operations may be preformed to identify a state of each cell. In contrast, data may be read from a single-level cell (SLC) flash memory using a single sensing operation. However, SLC flash memories have a lower storage density than MLC implementations.